i want someone who is expert and has knowledge in Basic Logic Gates and Seven Segment Displays

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I want someone who is expert in CPE, and could do for me lab report and also complete the lab questions i will post the lab file so every thing that been hi-lighted in yellow you have to complete it and make attention to it 

The lab report instructions :

Laboratory Report:Reports submitted INDIVIDUALLY!

A Laboratory report will be required after the completion of each laboratory assignment.

A lab report cannot be submitted if the lab was not attended. Every student must hand in an individual report at the beginning of lab. E-mailed lab reports will not be accepted. Members of the same group may share the design but they must have their own, individual answers and conclusions, including any answers to pre/post lab questions. Reports will always be due at the beginning of the next lab session. A 10% penalty will be applied for each day that the report is late. Copying lab reports will not be tolerated and will result in a zero grade as well as be reported to social justice.

A Lab report should consist of the following parts and should be WRITTEN IN YOUR OWN WORDS:

1)Title Page

The title page should include your name, experiment number and title, lab partner 

name, and the date the lab was performed.

2)Introduction

This section should include a brief overview of the lab and should not be written

in great detail.What is the problem you are trying to solve and why is it worth solving?What useful information should this experiment provide?

3)Experiment

Under the experiment heading you should state what you are trying to accomplish

on a particular part of the lab and HOW you accomplished it.What methods/techniques did you use?Design work should go in this section.This should include schematics, truth tables, equations, or anything else you used in designing or setting up your experiment.

4)Results

Theresultsectionshouldcontaintheresults(data)thatyouobtainedfrom

implementing the experiment as well as an analysis of the results (Explain what the results were and if they were what you expected? How so?).The results could beatruthtableofactualresultsobtained,oritcouldbeadescriptionofwhat worked, what didn’t work, and why it worked or didn’t work. If VHDL code is usedtoobtainresultsalwaysincludeitinthissection.Includepre/postlab questions at the end of this section.

5)Conclusion

This section should include what you learned from the lab.Please include how

you think the lab could be improved for the future.Do not simply summarize the experiment t.This is your chance to give feedback on the lab and voice your opinions.

The following characteristics are expected of each lab report:

•Professionalism/Neatness

•Labeled figures and tables

•Commented code

•Acceptable grammar and punctuation

•ALL wiring information/schematics (clearly labeled)

DO NOT copy and paste text straight from handout

The report requires considerable thought to present the information in a logical and concise manner. All reports should be computer generated, using a word processing program and any other applications needed for plotting, drawing, and analysis. Points will be deducted for lab reports with poorly drawn diagrams or hand-written answers.

The “experiment” and “results” section should be based on individual parts of the lab, so it’s likely you will have multiple “experiment” and “results” sections.For example, a lab report for an experiment with three parts would be outlined as follows:

Title Page Introduction Part I:

Experiment

Results

Part II: Experiment Results

Part III: Experiment Results

Pre/Post Lab Questions (graded as part of the results section) Conclusion

Unformatted Attachment Preview

Lane Department of Computer Science and Electrical Engineering Lab: 1 CpE 272 Digital Logic Laboratory Basic Logic Gates and Seven Segment Displays Spring 2017 West Virginia University - College of Engineering and Mineral Resources Basic Logic Gates The basic building blocks of any digital system are logic gates. These are simple elements with two or more inputs and one output. The outputs of the logic gates depend on the values of the inputs. In the digital world we always have two possible values for each input or outputs. When it comes to the theory, we represent these two values by “logic high” or “logic low” ( “1” or “0” / “true” or “false” represent the same) When it comes to the real circuits, which operate on electricity, two distinct voltage levels are used to distinguish between these two logic levels. i.e. +5V to represent the logic high and 0V to represent the logic low. There are 4 different basic logic gates: AND gate, OR gate, XOR gate and NOT gate. Derived from these basic logic gates a NAND gate, NOR gate and XNOR gate can be made by connecting a NOT gate to the outputs of AND, OR and XOR gates. The bubble at the output node represents this NOT operation. Altogether there are 7 logic gates and each gate has its own symbol as shown in Figure 1. Figure 1: Logic Gate Symbols Truth tables are often used to illustrate logical relationships as shown for the AND operation in Table 1. Table 1: AND Gate Truth Table A truth table provides a direct mapping between the possible inputs and outputs. A basic AND operation has two inputs with four possible combinations, because each input can be either a 1 or 0 — true or false. 1 Logic Integrated Circuits (ICs) Depending on the circuit technology being used, there are different kinds of logic families. They are CMOS, TTL and ECL. The difference is mainly with the operating speed and the supply voltage required to power up. True = One = High For TTL > 2.4V False = Zero = Low For TTL < 0.8V Figure 2: Integrated Circuit in dual inline package Figure 3: AND Gate Internal Connection Diagram The 74LS08 IC chip is a quad AND gate. As illustrated in Figure 3, the chip has 4 AND gates connected to 12 pins of the chip. It also has two pins labeled Vcc and GND to supply the power. The Vcc pin needs to be hooked up to +5v supply while the GND pin needs to be grounded. Note the semi-circle notch in Figure 3 that differentiates the different ends of the chip and helps when one is wiring it. Goals of this Lab This is an introduction to basic concepts of logic gates, and familiarization with some lab tools. We will be working with integrated circuit chips (ICs). Here are a few rules to follow: • • • Connect a wire from the +5 volts to the bus with a red line and a wire from ground to the bus with a blue line. This will now allow you to have a more organized proto board. Be careful to avoid reversing power connections. Typically we only need +5 V and 0 V (ground) connections for digital circuits. Ask your Teaching Assistant for help with setting up power busses on your prototype board if in doubt. When placing your chips have them lay over the large gap in the middle of the proto board. 2 All the slots in each column are connected together Figure 4: AND Gate Proto-Board Setup • • • Make sure to connect the Vcc pin (Pin 14) to +5V volts and the ground pin (Pin 7) to ground for every chip! We will primarily be using TTL circuitry. Do not connect TTL outputs together; as the resulting circuit will not work (multiple inputs can be connected). It is a good convention to have all your chips oriented in the same direction. For example have all the semi-circle notches pointing one direction. Verification of IC Chips Verification: Verify that the AND, OR, NOT, XOR, NAND, NOR, and XNOR IC chips operate correctly by determining their truth tables on the proto-board. When doing this connect the two inputs to two pushbuttons and the output to a LED. • AND Gate - The logic expression for the AND operation is given by Y = AB Or Y=A.B In this part you are going to verify the truth table by wiring a 74LS08 IC on the proto-board. The internal connection diagram of the 74LS08 IC chip is shown in Figure 4 along with its corresponding truth table in Table 2. Inputs A L L H H Figure 4: AND Gate Internal connection Diagram Output B L H L H Y L L L H Table 2: AND Gate Truth Table 3 • OR Gate - The logic expression for the OR operation is given by Y=A+B In this part you are going to verify the truth table by wiring a 74LS32 IC on the proto-board. The internal connection diagram of 74LS32 IC chip is shown in Figure 5 along with its corresponding truth table in Table 3. Inputs A L L H H Y L H H H Table 3: OR Gate Truth Table Figure 5: OR Gate Internal Connection Diagram • Output B L H L H NOT Gate - The logic expression for the NOT operation is given by Y= A In this part you are going to verify the truth table by wiring a 74LS04 IC chip on a protoboard. The internal connection diagram of 74LS04 is given in Figure 6 along with its corresponding truth table in Table 4. Input Output A L H Y H L Table 4: Not Gate Truth Table Figure 6: NOT Gate Internal Connection Diagram 4 • NAND Gate - The logic expression for the NAND operation is given by Y = (AB)’ or Y = (A.B)’ In this part you are going to verify the truth table by wiring a 74LS00 IC chip on a protoboard. The internal connection diagram of 74LS00 is given in Figure 7 along with its corresponding truth table in Table 5. Inputs A L L H H B L H L H Y H H H L Table 5: NAND Gate Truth Table Figure 5: NAND Gate Internal Connection Diagram • Output XOR Gate - The logic expression for XOR operation is given by Y=A + B In this part you are going to verify the truth table by wiring a 74LS86 IC chip to a proto-board. The internal connection diagram of 74LS86 is given in Figure 8 along with its corresponding truth table in Table 6. Inputs A L L H H Figure 8: XOR Gate Internal Connection Diagram Output B L H L H Y L H H L Table 6: XOR Gate Truth Table 5 Part I – Building Logic Diagram Circuits In this part you are going to wire the following logic diagrams on the proto-board and determine each ones truth table by using pushbuttons to enter different input combinations. This is the informati on you want in your Experim ent section. Experiment 1: A G1 B G2 G3 C Y Logic Expression (i.e. the equation for Y): __________________________________________________________ A B C G1= G2= G3=Y= 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 0 0 0 0 1 1 0 0 1 1 1 1 1 1 0 1 1 1 1 1 This is the informati on you want in your Results section. NOTE: In lab report make sure to include logic diagram, logic expression, and the output truth table. 6 Experiment 2: B G1 C G2 G4 A C G3 Y This is the informati on you want in your Experim ent section. Logic Expression: __________________________________________________________ A B C G1= G2= G3= G4=Y= 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 1 1 0 0 1 1 0 0 1 1 0 1 1 1 0 1 1 0 1 0 1 0 1 0 0 0 0 0 1 0 0 0 This is the informati on you want in your Results section. NOTE: In lab report make sure to include logic diagram, logic expression, and the output truth table. 7 Part II- Combinational Logic Networks The logic gates explained earlier can be connected to make useful decision making systems. Those circuits are called combinational logic networks. The output of those circuits depends on the inputs and the function it performs. As a design example, we will design a two-way light controller circuit. The circuit can be used to control a single light from either of the two switches, x1 and x2, where a closed switch corresponds to the logic value 1. Figure 9 shows the truth table of the circuit. Figure 9: Two-way Light Controller Truth Table We can write a Boolean equation for any truth table by summing each of the minterms for which the output, f, is TRUE. NOTE: A minterm is a product involving all of the inputs to the function. A.B.C is a minterm for a function of the three variables A, B, and C, but A.B is not, because it does not involve C. When creating a minterm the inputs that are logic low are complimented in the expression. For example, in Figure 10, there are only two rows (or minterms) for which the output f is TRUE (logic high), shown circled. Looking at these two rows, use AND gates to sum the inputs and then an OR gate to connect the two terms together. Lastly, complement each input that is logic low. Figure 10: Circled Minterms Resulting Logic Expression using Minterms: f = x1 .x 2 + x1 .x 2 Once the logic expression is found the logic gates can be used to realize the function. In this case, 8 In your Experiment section, very briefly explain minterms concept. Then, explain what is being asked of you to be solved. If you remember the XOR function, this performs the same operation. Experiment: Three inputs can be used to represent the numbers 0 to 7. If you have A,B,C lines (inputs) which represent a number, design a circuit to find whether the number it represent is divisible by 3. Thus, the output of the circuit should be high whenever the input represents a number divisible by 3 (Do NOT include zero as divisible by 3). Binary Decimal 0 0 0 0 0 0 1 1 0 1 0 2 0 1 1 3 1 0 0 4 1 0 1 5 1 1 0 6 1 1 1 7 1) Come up with a truth table to accomplish this task. Truth Table: Decimal Binary 0 0 0 0 Y 0 1 0 0 1 0 2 0 1 0 0 3 0 1 1 1 4 1 0 0 0 5 1 0 1 0 6 1 1 0 1 7 1 1 1 0 Results section material 2) Derive the logic expression using minterms. a. Logic Expression: ___________________________________________________________________ b. Algebraically minimize the above expression:__________________________________ 9 3) Draw the circuit diagram according to the algebraically minimized expresion and construct the circuit on the proto-board. Demonstrate this to your instructor. Circuit Diagram: Results section material NOTE: In lab report make sure to include truth table, logic expression, and the circuit diagram (or logic diagram). 10 Seven Segment Displays Seven-Segment displays use 8 LED’s to display numbers and characters by lighting in any desired combination. These displays require drivers or decoders that must be either purchased as chips or designed. To light up a segment in a seven segment display, a logic low must be supplied to the corresponding segment if you are using a common anode type display. Experi ment Section The term "common anode" refers to the fact that the anode portions of each LED segment are connected together at the upper voltage source. This means that individual LED segments are lit by connecting their cathode to a lower voltage. Although it seems backwards to turn on the LED segments with a low signal, early logic chips like standard TTL are capable of delivering a greater amount of current with an output that is logic low. Part III – Seven Segment Display All components are represented by a part number which can be used to look up its corresponding datasheet. A datasheet contains all kinds of information about a specific device such as the driving current, operating temperature range, pin connections, etc. Using the internet and the part number, which can be found on the component, look up the datasheet for the common anode seven segment displays. With the aid of the datasheet, correspond letters a through g on the segments below to its respective pin. Segments a , d, and pin 1 are already given as a good starting reference. Common anode Results Section d 1 a 10 2 9 3 8 4 7 5 d a 6 Common Anode Seven Segment Display ◼ Have your TA check the diagram you have created and place this diagram in your report. 11 Place both a seven segment display and resistor on a proto-board. Connect +5V through the resistor pack and then into the seven segment display. Display the number 5 on the 7Segment display by hardwiring the correct segments to ground. Note: In the lab report make sure to include the completed 7-segment display and explain how you accomplished getting the number five to light up. Post-lab Questions for Lab 1: 1) Draw a truth table (similar to the last experiment) to represent number 0-7 divisible by 2. Again, don’t include zero. Find the output minterm logic expression. 2) Draw a logic diagram to show how you could construct an AND gate using only NAND gates. Label your inputs and outputs 3) Comparing the two expressions of the divisible by 3 experiment (i.e. Part II: 2a and 2b), what was the overall benefit of manipulating the expression if they both give you the same exact output and why the effort was useful? (HINT: Think about if you were given a choice to construct one the expressions into a breadboard circuit. Which one would you choose and why?) 4) When using a common anode seven segment display, does applying a logic high or logic low signal light up a segment? Why does it function that way or why wouldn’t it be the opposite logic signal of what you stated? Pre-lab Questions for Lab 2: 1) What is a binary subtractor? 12 Lab 1: Basic Logic Gates Notes Logic High – 1 Logic Low – 0 DISCUSS WHAT THIS ACTUALLY MEANS OUTSIDE THE SOFTWARE WORLD. E.G. An EE would say +5V or 0V on an o-scope or DMM. For a pushbutton 1=unpressed and 0=pressed. An LED would be 1=lit and 0=unlit. _____________________________________________________________________________________ AND Gate: Y = AB IC: 74LS08 Block Diagram Truth Table A B 0 0 1 1 IC Pin-out Y 0 1 0 1 0 0 0 1 _____________________________________________________________________________________ OR Gate: Y = A + B IC: 74LS32 Block Diagram Truth Table A IC Pin-out B 0 0 1 1 Y 0 1 0 1 0 1 1 1 _____________________________________________________________________________________ XOR Gate: Y = 𝐴̅𝐵 + 𝐴𝐵̅ = A B Note this function can be thought of as an odd # of input 1’s detector. Block Diagram Truth Table A IC Pin-out B 0 0 1 1 Y 0 1 0 1 0 1 1 0 _____________________________________________________________________________________ NOT Gate: Y = 𝐴̅ IC: 74LS04 Block Diagram Truth Table A Y 0 1 IC Pin-out 1 0 _____________________________________________________________________________________ ̅̅̅̅ NAND Gate: Y = 𝐴𝐵 IC: 74LS00 Block Diagram Truth Table A B 0 0 1 1 Y 0 1 0 1 1 1 1 0 IC Pin-out _____________________________________________________________________________________ NOR Gate: Y = = ̅̅̅̅̅̅̅̅ 𝐴+𝐵 Block Diagram Truth Table A B Y 0 0 1 0 1 0 1 0 0 1 1 0 _____________________________________________________________________________________ XNOR Gate: Y = ̅̅̅̅̅̅̅ 𝐴 𝐵 IC: 74LS86 Block Diagram Truth Table A B 0 0 1 1 Y 0 1 0 1 1 0 0 1 _____________________________________________________________________________________ IC Chips Internal Connection Diagram: AND IC CHIP Input PINS: Output PINS: +5V PIN: Ground PIN: 1, 2, 4, 5, 9, 10, 12, 13 3, 6, 8, 11 14 7 LED Logic (e.g. the binary value your Y output represents): Logic High – 1 – Lit Logic Low – 0 – Unlit ____________________________________________________________________________________ Pushbutton Logic (e.g. the binary value your inputs A, B, and C represent) Logic High (1) – Unpressed Logic Low (0) – Pressed _____________________________________________________________________________________ LED Logic Ground Cathode (-) Apply Anode to Output Pin (+) Easiest way to remember is that is that CATs 🙀, which its spelling shares the first 3 characters of CAThode, are bad or negative. _____________________________________________________________________________________ Generation a Boolean equation in Minterms (Sum of Products) form Steps: 1. Fill out truth table columns for each gate moving from left to right until reaching the final gate, which will represent your final output. 2. Sum of Products are made off of outputs that are logic high 3. All products are summed together 4. Complement input variables that are logic low Example: A B G2 G3 Y G1 C A B C 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 G1= G2= G3=Y= Output Equation (i.e. Output equation Y):__________________________________________ ____________________________________________________________________________________ Breadboard Crash Course -Reserve the two horizontal connections (one of them is in red) for your +5 and your Gnd. Figure 1: The "Voltage Rails" in red are all interconnected horizontally. Regular connections are for your discrete components (e.g. the blue interconnections) [1] Figure 2: A component's pins need to be placed in separate connection lines, otherwise you have shorted your components pins together. [2] Ravine Figure 3: An example of a correctly realized schematic on a breadboard. The blue wire and black wire should be placed in their respective horizontal rails. [3] Keep a good wiring and chip convention. Ravine Ravine Figure 4: Keep all chips in the same orientation to avoid wiring mistakes of Vcc, Gnd, inputs, and outputs (note the notch on the chip) A PB8 B PB7 C PB6 All breadboard wiring within box _____________________________________________________________________________________ Common Anode Seven Segment Display • • Logic Low lights up each segment Lab handout directions specify to lookup datasheet of device, however, this device is discontinued and as a result makes it difficult to find its proper datasheet. Instead, google “common anode seven segment display pdf” and select the e-radionica link (should be within top 5) to load a similar company’s common anode seven segment display datasheet. The pertinent information for completing this experiment is on page 5. **Connect the +5V through a 150 Ohm resistor and then into one the seven segment displays common anode pins** Common anode d 1 a 10 2 9 3 8 4 7 5 d Ravine Figure 5: Resistor Pack 6 a References: [1] http://wiring.org.co/learning/tutorials/breadboard/imgs/breadboard-02.jpg [2] http://wiring.org.co/learning/tutorials/diagrams/imgs/diagram-04.jpg [3] http://wiring.org.co/learning/tutorials/diagrams/imgs/diagram-05.jpg
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CpE 272
Digital Logic Laboratory
Basic Logic Gates

Introduction
The lab intends to elucidate the 4 basic logic gates namely AND, OR, XOR and NOT. The logic
gates necessitates preparation of an electrical circuit. The tools required are the wires, proto board
together with integrated circuit chips. The knowledge is significant as it helps on circuit
preparation and use of the appropriate chip.
# Experiment 2
A 74LS08 IC chip is connected in the circuit. A connection of 5 volt wire is made to the red line.
The ground connects the blue line and the chip. Inputs are later on connected to the two
pushbuttons whereas o...


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