Computer architecture project.

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Computer Science



all the requirements are attached, please read them carefully. its a computer architecture project about vhdl.

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1 Term Project Fall 2019 EEGR 243- Computer Architecture Phase 1 Due Nov-14-2019 Goal: This phase of the project is to design and implement instruction fetch unit of LEGv8 processor. The figure shown below is the high-level block diagram of the pipelined fetch stage which consists of three components: instruction memory, Program Counter (PC) register, and an ADD unit. 2 Term Project Fall 2019 EEGR 243- Computer Architecture Phase 1 Due Nov-14-2019 Required Specifications: PC: should be synchronous block which have 64-bit input and 64-bit output. Instruction memory: should be synchronous block with PC; both have the same clock signal. Read address input is 16-bit wide and the instruction memory output must be 32 bits. Add unit: must be combinational circuit with 2 64-bit inputs, one of the input is 4. Constraints 1- Develop the Add unit without using any of IP catalog cores. 2- Initialize the first 5 locations of instruction memory by storing instruction codes in memory coefficient (COE) file. 3- Read address of the instruction memory must be connected to 16 least significant bits of PC. Requirements: I. Hard copy of your report and its pdf. file containing the following: 1. Modified block diagram, showing the bits and additional connections 2. What are the objectives 3. Elaboration on Verilog or VHDL implementation 4. Synthesis results; along with RTL view snap shot 5. Elaboration on test bench: e.g. how many instructions are loaded, how many are read, how you enabled the add block etc. 6. Elaboration on the waveform and snapshot of the waveform must also be included. Both writing and reading from the memory should be clearly shown in the waveform. Elaboration must state whether the waveform show the successful implementation. II. A zipped Verilog or VHDL Implementation of the Project: A folder containing all the files generated by Vivado including all the .v or .vhd, should be submitted to the drop box via D2L. Name the submitted folder as the name of your group ( max of two).
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