EE 430 SPICE ASSIGNMENT #1
DIFFERENTIAL AMPLIFIER DESIGN
Due: Oct. 28, 2020.
In this assignment, you will design a differential amplifier satisfying the required differential gain, input
impedance, and single-ended common-mode gain; when fed by a small-signal. Then you will simulate your
circuit on LTSpice to compare the simulation results with hand calculations.
A. Hand design: Design the bipolar differential amplifier and the current source and bias network
𝑉
𝑉
(𝑅1 , 𝑄3 , 𝑎𝑛𝑑 𝑄4 ) above such that: (i) Differential gain: 𝐴𝑑 ≥ 200 , (ii) Input differential resistance: 𝑅𝑖𝑑 ≥
50 𝑘Ω, and (iii) 𝑨𝒄𝒎 < 𝟎. 𝟏 where 𝐴𝑐𝑚 is the single-ended common-mode gain (the gain to a commonmode input signal when the output is measured not differentially but from one of the outputs with respect
to ground). Design the circuit with BJTs having 𝛽 = 200, 𝑉𝐴 = 100 𝑉, 𝑎𝑛𝑑 𝑉𝐵𝐸 =
~0.7 𝑉 𝑖𝑛 𝐹𝑜𝑟𝑤𝑎𝑟𝑑 𝐴𝑐𝑡𝑖𝑣𝑒. Use +𝑉𝐷𝐷 = 9 𝑉 and −𝑉𝑆𝑆 = −9 𝑉. Clearly show your steps.
Design Suggestion for Part A.
1. Derive 𝐴𝑑 , 𝑅𝑖𝑑 , 𝑎𝑛𝑑 𝐴𝑐𝑚 expressions. (When deriving 𝐴𝑐𝑚 and 𝑅𝑖𝑑 you can ignore 𝑟𝑜 of Q1 and
Q2. Needless to say, you cannot ignore 𝑟𝑜 of Q4 when deriving 𝐴𝑐𝑚 . Do not ignore 𝑟𝑜 of Q1 or Q2
when deriving 𝐴𝑑 ).
2. Plug the “dc currents”, “resistors”, “𝑉𝑡ℎ ", “𝛽”, “𝑉𝐴 ", etc. into 𝐴𝑑 , 𝑅𝑖𝑑 , 𝑎𝑛𝑑 𝐴𝑐𝑚 expressions and
simplify the expressions to the extent possible (e.g., manipulate the expressions and then replace
𝑉𝐴 = 100 𝑉, 𝛽 = 200, etc.)
3. Consider the three design constraints. You basically have each constraint represented in terms of
the dc currents, and resistors.
4. Start with dc current selection satisfying your constraint(s) => Find R1, and other parameters
associated with the dc current selected.
5. Then based on the constraint(s) => Find R2.
In your simulations on the next page, use the BJT model 2N2222 of NXP, which has a SPICE model as below
with 𝑉𝐴 and 𝛽 highlighted:
B. DC Analysis: In LTSpice do a DC operating point simulation (.op) with both inputs connected to ground.
Find the simulated DC values for 𝐼𝑅1 , 𝐼𝐶3 , 𝐼𝐶4 , 𝐼𝐶1 , 𝐼𝐶2 , 𝑉𝐵3 , 𝑉𝐸1,2 , 𝑉𝑂1 , 𝑉𝑂2 . Compare them with your hand
calculations. Additionally, comment on the matching between 𝐼𝑅1 𝑎𝑛𝑑 𝐼𝐶4 and comment on the
theoretical vs. simulated match between 𝐼𝑅1 𝑎𝑛𝑑 𝐼𝐶4 .
C. Transient Analysis: In LTSpice do a transient simulation (.tran) for 100 ms.
For differential small-signal input simulations:
𝑣
Apply 𝑣𝑖𝑑 = 1 𝑚𝑉𝑝 𝑠𝑖𝑛𝑢𝑠𝑜𝑖𝑑𝑎𝑙 𝑠𝑖𝑔𝑛𝑎𝑙 𝑎𝑡 100 𝐻𝑧. [i.e., 𝑣𝑖𝑑1 = + 2𝑖𝑑 = 0.5 𝑚𝑉 sin (2 ∗ 𝜋 ∗ 100𝐻𝑧 ∗ 𝑡)
and 𝑣𝑖𝑑2 = −
𝑣𝑖𝑑
2
= 0.5 𝑚𝑉 sin ((2 ∗ 𝜋 ∗ 100𝐻𝑧 ∗ 𝑡) + 𝜋) with DC offset = 0V. ]
For common-mode small-signal input simulations:
Apply 𝑣𝑐𝑚 = 1 𝑚𝑉𝑝 𝑠𝑖𝑛𝑢𝑠𝑜𝑖𝑑𝑎𝑙 𝑠𝑖𝑔𝑛𝑎𝑙 𝑎𝑡 100 𝐻𝑧. [i.e., 𝑣𝑖𝑐𝑚1 = 𝑣𝑖𝑐𝑚2 = 𝑣𝑐𝑚 = 1 𝑚𝑉 sin (2 ∗ 𝜋 ∗
100𝐻𝑧 ∗ 𝑡) with DC offset = 0V.]
1.
For the differential small-signal input, what is the expected emitter voltage of Q1 and Q2,
𝑣𝑒1 (= 𝑣𝑒2 )? Plot the simulated waveform. What is the simulated value of 𝑣𝑒1 (= 𝑣𝑒2 )?
2.
Plot 𝑣𝑖𝑑 , 𝑣𝑜𝑑 (𝑣𝑜𝑑 = 𝑣𝑜2 − 𝑣𝑜1 ), 𝑎𝑛𝑑 𝑖𝑖𝑑 . Note that 𝑖𝑖𝑑 is the base current of Q1 (𝑖𝑖𝑑 = 𝑖𝑏1 ).
Calculate the simulated 𝐴𝑑 = 𝑣𝑜𝑑 /𝑣𝑖𝑑 and 𝑅𝑖𝑑 = 𝑣𝑖𝑑 /𝑖𝑖𝑑 . Compare the values with your
design targets.
3.
If the simulation results do not match the design constraints, tune your circuit to achieve the
goals.
4.
For the common-mode small-signal input, plot 𝑣𝑐𝑚 and 𝑣𝑜𝑐𝑚 . (𝑣𝑜𝑐𝑚 = 𝑣𝑜𝑐𝑚2 =
𝑣𝑜𝑐𝑚1 𝑤ℎ𝑒𝑛 𝑡ℎ𝑒 𝑖𝑛𝑝𝑢𝑡 𝑖𝑠 𝑎 𝑐𝑜𝑚𝑚𝑜𝑛 − 𝑚𝑜𝑑𝑒 𝑠𝑖𝑔𝑛𝑎𝑙)
Report Requirements
A. In part A, your hand calculations must follow a flow, you must show every step for derivations, and
clearly present how/why you select the parameters with any approximations you might have made.
B and C. For parts B and C, in addition to answering the questions and plotting the simulation results
requested, fill the table below, and explain the reasons for any discrepancy exceeding 10%.
𝐼𝑅1
𝐼𝐶3
𝐼𝐶4
𝐼𝐶1
𝐼𝐶2
Hand
calculations
Simulated
Percent
discrepancy
𝑉𝐵3
Hand
calculations
Simulated
Percent
discrepancy
𝑉𝐸1,2
𝑉𝑂1
𝑉𝑂2
𝐴𝑑
𝑅𝑖𝑛
𝐴𝑐𝑚

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