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ALU, cache hierarchy

Engineering
Tutor: None Selected Time limit: 0 Hours

Dec 19th, 2014

a)MIPS load and store instructions are the only ones that can directly access memory hence the answer is no.

b)Cache memory since its located directly above the processor chip with three levels L1,L2 and L3 cache having increasing speeds.

The L1 cache is the fastest and uses SRAM i.e. static RAM technology.

Dec 19th, 2014

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Dec 19th, 2014
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Dec 19th, 2014
Dec 11th, 2016
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