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EEGR 317 Final Project – DRAM vs SRAM
It is acknowledged that the development of transistors allowed for some of the biggest
technological advances for mankind. Transistors applicability to a variety of electrical
engineering functions allowed for the creation of a number of devices. More so the mosfet, with
its capabilities, allowed for the development and advancement of computer technology. One of
the main parts of computers that mosfets are involved in are random access memory (RAM).
There are two main types of RAM: DRAM (dynamic random access memory) and SRAM (static
random access memory). These types of RAM are composed of memory cells that consists of
mosfets. In this project, students will explore and design their own DRAM and SRAM cells.
The students are tasked with designing DRAM and SRAM memory cells, using LT
Spice, and perform a comparison and a contrast of both types of RAM. The specifications of the
project will be outlined below.
Figure 1 - RAM
Design Phase I:
Figure 2 – Memory Cell
Memory cells are powered by two different lines of voltage sources. Those lines are
called the Word Line and the Bit Line. As shown above the Word Line runs either as a row or a
column, while the Bit Line runs perpendicular to it. The Word Line acts a signal that access the
memory cell so that a write or read function may be performed. The Bit Line is the signal that
controls the reading and writing of a bit. Shown below are examples of the Word and Bit lines
operating for a DRAM and SRAM.
Figure 3 – DRAM Memory Operation
Figure 4 – SRAM Memory Operation
Initial DRAM Specifications:
Build a 4x4 DRAM memory circuit
Word and Bit lines must be powered by 6V sources.
The output voltage may range from 4V to 4.5V when memory is stored
The “bit” must be read for 2ns
The “bit” must be stored for 1ns
The “bit” must be written in 1ns
A memory cell must obtain the maximum current of 2mA
Initial SRAM Specifications:
Build a 2x2 SRAM memory circuit
Word and Bit lines must be powered by 6V sources
The “bit” must be stored for 3ns
The output voltage must be 4V when memory is stored
The output voltage must be 2V when there is no memory stored
The current when a “bit” is stored should be 180uA
Vary the signal coming into the word line to be greater than the bit line. Explain how
does that affect memory storage (variance between word line and bit line must be 1V or
Vary the signal coming into the word line to be lower than the bit line. Explain how does
that affect memory storage (variance between word line and bit line must be 1V or more).
Vary the signal coming into the word line to be faster than the bit line. Explain how does
that affect memory storage.
Vary the signal coming into the word line to be slower than the bit line. Explain how does
that affect memory storage.
Design Phase II:
Sense amplifiers are circuits built to work with RAM. They operate by detecting low
power signals along the bit line, amplify them to recognizable logic levels at the output. There
are two different types of sense amplifiers, a differential sense amplifier (which operates for
voltage), and a non-differential sense amplifier (which operates for current).
Sense Amplifier Specifications:
Design a differential sense amplifier for both circuits in the previous design phase
Design the sense amplifier so that an output of 3V would be recognized as a “1”
The reference signal going into the sense amplifier must be 5V
Design the appropriate number of sense amplifiers for the memory circuits
Explain the significant differences that were noticed between DRAM and SRAM. What
are scenarios where DRAM would be preferred? What are scenarios where SRAM would
Write a detailed report showing the findings from the simulation and answers to the
discussion questions. This report must be written in IEEE format (please review IEEE format
and observe uploaded example on Canvas) with proper citations from referenced material.
Report must include all necessary hand calculations made, as well as necessary image. The
report must be between four to 6 pages in total. NO LATE SUBMISSIONS OF THE
REPORT WILL BE ACCEPTED WITHOUT PROPER REASON.
Title – 5%
Abstract – 10%
Background/Introduction – 30%
Methodology – 30%
Results – 15%
Conclusion – 10%
Students will lose points if the report:
Does not follow IEEE format
Usage of pronouns
Does not include all graded sections
*Plagiarism or no citation for material will result in a score of zero for the report. Images from
the internet are inclusive of this.
Handy, Jim. “Emerging Memories Today: Understanding Bit Selectors.” The Memory Guy, 23 Jan.
Wie, C. Introduction, jas.eng.buffalo.edu/education/system/memory/intro.html.
windows101tricks. “Static RAM Vs Dynamic RAM, Which Is Better?” Medium, Medium, 6 Apr.