digital logic lab report

timer Asked: Nov 11th, 2016

Question description

I have done everything in the lab but I need someone to organize it on WORD do the tables and the equations with an introduction and conclusion. The circuit is already done but I need someone to use Multisim to draw the circuit. I will attach everything you need, Note: everything is ready you don't have to solve it you just have to organize it in WORD by do an introduction and conclusion and table and the circuit Multisim. And please i need u to discussion part to my lab and explain all parts

I will attach all thing that I have for part 1 and part 2

and the instructions

the part 1 file has 3 paper , the first and second paper for part 1 and the third paper is for part 2

so it will in 3 files


EEGR 211 Lab 4 – Sequential Circuits This laboratory exercise is designed for students to analyze and design sequential circuits, primarily based on Chapter 12 (Registers and Counters). Shift Register Figure 1: Shift Register with Inverted Feedback (Figure 12-12) Build the circuit in Figure 1 and test it to show that it transitions through the states in the transition graph. Be sure to connect any preset or clear inputs correctly. Gray Code Up Counter Design Design and build a two-bit Gray counter with one input (U). When U = 1, the Q output of the D flip-flops transition through the following states: 00 01 11 10 00. When U = 0, the Q output of the D flip-flops transitions to 00, regardless of the present state. Documentation/Circuits to Submit in your laboratory report (MUST BE TYPED) 1. Design, including state table, schematic, and MultiSim (or equivalent) Simulation. 2. Documentation of your testing (link to a short video on YouTube). 3. Discussion of results from design, simulation and testing such as circuit design, implementation challenges, etc.
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