digital logic lab report help and multisim

timer Asked: Nov 16th, 2016

Question description


I have a lab that I will designed circuit and do lab report for it I did the circuit but I have left the rest shown in the attachment include simulation by multisim

everything clear in the attachment

digital logic lab report help and multisim
digital logic lab report help and multisim
digital logic lab report help and multisim
EEGR 211 Lab 4 – Sequential Circuits This laboratory exercise is designed for students to analyze and design sequential circuits, primarily based on Chapter 12 (Registers and Counters). Shift Register Figure 1: Shift Register with Inverted Feedback (Figure 12-12) Build the circuit in Figure 1 and test it to show that it transitions through the states in the transition graph. Be sure to connect any preset or clear inputs correctly. Gray Code Up Counter Design Design and build a two-bit Gray counter with one input (U). When U = 1, the Q output of the D flip-flops transition through the following states: 00 01 11 10 00. When U = 0, the Q output of the D flip-flops transitions to 00, regardless of the present state. Documentation/Circuits to Submit in your laboratory report (MUST BE TYPED) 1. Design, including state table, schematic, and MultiSim (or equivalent) Simulation. 2. Documentation of your testing (link to a short video on YouTube). 3. Discussion of results from design, simulation and testing such as circuit design, implementation challenges, etc.
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