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READING REPORT GUIDELINES: Frontpage & “Examples” : 1. There shouldn’t be any pages blank in the last, no initial pages with only writings as “Reading Report Chapter X” and no “contents” page. Please start writing “Chapter Outline” directly. Otherwise scores will be reduced. 2. Its better all students use Font “Cambria” with size “11” 3. There should be only 1 PDF files, Merge Report, Examples, Interview Questions into only 1 PDF file. Please use https://www.pdfmerge.com/ 4. Name of the file should be “R3_FIRSTNAME_LASTNAME.pdf”, where R3 stands for Report for Chapter 3. 5. For all handwritten “Examples & Interview Questions”, Use the mobile app “CamScanner” for a PDF file. Please avoid using images as figures from “CamScanner” as it gives big file size, Its hard to open/download/load while grading. “CamScanner” enhances the images taken in camera and do more image processing for better visibility. Use PDF file from “CamScanner”. It make sure the image/photo is covering the entire page of PDF file. You don’t need to take the image/photo in word and do lot of work on it. It gives PDF file directly. U just need to merge the report and this PDF file through the above website. Note : “CamScanner” writes “Scanned by CamScanner” in the bottom right hand side. Chapter Outline : 1. Give detailed description of all the topic. Sparse/less quality writing fetches very low grades. 2. Complete “Summary” should be written. Write a short description about the whole chapter you read. “Weak” Summary fetches very low grades. The example report 1 is very “weak”. Figures : It is expected to put figures which has very important technical things such as (For Chapter 2) 1. All Theorems and Axioms of Boolean Algebra (from Identity Theorem to De-Morgan's Theorem for multi variables) 2. Bubble Pushing makes the circuit design using only NAND and NOR gates (Universal Gates) 3. Critical Paths to find Contamination Delay and Propagation Delay 4. Circuit Techniques to avoid Glitches by "Redundant Implicant" which is not "Prime Implicant" 5. 4 variable “karnaugh map” It is not just "Copy and paste 2 figures from the chapter, explain their significance". A highquality report needs “very important” and “more technical writings”. Less quality of the material in the "figures" fetches very low grades. Please align the images to the center. Reflection : The following points if you come across, please include. If you don’t have all the following points, no need. But still the “Reflection” part should be very “strong”. The example report 1 is very “weak”. It is lacking all the following points. 1. 2. 3. 4. Write about related concepts from other subjects like ENGR303 or ECE322. Critiquing the strength and weakness of the chapter 3 and its contents. Any real-world applications which you can correlate or link to what you have read. Outside discussions with classmates/TAs/seniors on the related topics (You may not have had such discussions, so you can avoid). 5. Examine the strength and weakness of students own views on the topic. Final Note: Only latest submission will be graded. So, follow all the above-mentioned guidelines and submit from Chapter 3 onwards. Whoever have submitted already should submit according to above guidelines. Otherwise it fetches very low grades. Books for further reading: Majority of the ECE & CS books can be downloaded from http://gen.lib.rus.ec/ Digital Electronics books for detailed Karnaugh Map, Sequential Circuit Design 1. John M Yarbrough “Digital Logic Applications and Design” Computer Organization and Architecture 1. John L. Hennessy, David A. Patterson “Computer Organization and Design, The Hardware/Software Interface” 2. John L. Hennessy, David A. Patterson “Computer Architecture, A Quantitative Approach” ECE 271 04/17/2017 Chapter 2: Combinational logic design This report is designed to give a quick overview of chapter two. The paper has been broken down into several sections each carrying its unique purpose. 1) Chapter Outline 1. 2.1 Introduction: This chapter focuses on combinational logic circuits and their wide range of applications. In digital electronics, time independent logic is a special form of digital logic that can be executed by Boolean circuits. In that, the output is solely a function of the direct input. As opposed to other logic, i.e sequential, where the output is directly influenced by the nature of the input and its history, combinational logic design has a direct input to output relation. The main reason for this is behavior is the lack of memory on non-sequential logic designs. In combinational logic, the circuit designs are used to execute Boolean algebra ("Combinational Logic Circuits"). The input signals are manipulated and the desired output is achieved depending on the type of function. However, computers operate with both the sequential and combinational design circuits. Some of the combinational circuits such as multiplexers, full and half subtractors, adders and demultiplexers are also used in microprocessors. 2. 2.2 Boolean equations: This equations revolve around binary variables such as TRUE or FALSE and are normally associated with combinational logic circuit designs. The digital world entirely depends on such sce- narios as they are best for digital logic descriptions. This subtopic contains various terminologies that are relevant for understanding Boolean equations and their related truth table applications. Some of the terminologies are briefly explained below. •! Compliment – This is simply the reverse of a certain variable. For example, a variable A has its complement as Ä. The small ‘dash’ at the top is used to represent ‘inverse’ of any variable. The former is the real variable, and the latter with a dash represents the complement. •! AND – This term is used to stand for a product. It is used in Boolean equations to show the completeness that has to be fulfilled for a function to be executed. •! The OR is another important term used to show summation. It is represented by the summation symbol ‘+’ and is used in equations to show the possibility of another outcome if the first is not fulfilled. It is important to note that during the execution of equations some variables take precedence over others. For example, the NOT comes first followed by AND and finally OR. 3. 2.3 Boolean Algebra: Boolean algebra is equations that can be used to simplify Boolean equations. This is very much similar to how algebra is used to simplify mathematical equations. Boolean algebra is simply a set of axioms that are normally regarded to be correct. Thus, for one to ascertain the surety of axioms Boolean algebra is used as they cannot be proven in any other way. Various theorems are proved from such axioms. Theorems must always be proven as there is a need to develop com-pact, effective and less costly circuits. The topic also covers truth tables and the various ways of presenting function in them. The sumsof-products form and product-of –sums have also been discussed. These two presentation tech- niques are used to simplify equations in the truth table using the simplest way possible that can be executed by a microprocessor. 4. 2.4 From logic to gates: This simply cover the implementation of various Boolean functions using well-drawn schematics that combine several gates. A logic gate is an electronic circuit physically fabricated that aids in implementing Boolean functions. It can perform various logic operations depending on the na-ture of the input and then gives out a binary output. Binary in the sense that it either outputs zero (0) or one (1), TRUE or FALSE. The architecture of logic gates as perceived in this topic is simple and precise. For any function that one may desire to implement, a parallel desirable logic gate with a simple design but conclusive is also necessary. Diodes and transistors or either of them are normally used together or independently to design the gates. However, vacuum tubes, relays among other components can also be used. The use logic gates in circuits have seen its applications in arithmetic logic units, registers, and multiplexers. A collection of this gates has been used in much smaller integrated circuits, which have given rise to powerful microprocessors that can execute several tasks without burning out. Various types of transistors such as the common bipolar junction transistors or BJTs are used in conjunction with other transistor types to produce stable logic systems. With the increase in complexity of transistors, BJTs are substituted with much smaller MOSFETs which utilize less space but functioning in the same way or better than bipolar transistors. It is important to note that relays can also function in the same manner but electronic gates are mostly preferred. This is because they occupy less space, use less power and are much faster. The topic further tackles the design problem in this chapter by using examples which are well solved. Truth tables have been used to show the flow of ideas and he best results that can be achieved by specific gates. 5. 2.5 Multilevel combinational logic: The multilevel design is aimed at achieving a more compact circuit design with less hardware and space. This topic looks at various ways in which multilevel can be implemented to produce smaller but effective circuits. A multilevel logic is a circuit representation that is more generic and contains a wide range sophistication of sum-of-product and product-of-sum forms. Such op-timization is possible with either functional BDDs or structural sums-of-product. Logic in SOP is referred to as a two-level-logic because it entails levels of AND and OR gates connected to each other. In multilevel when executing a system of equations, say two equations the number of lev-els increases but the number of product terms significantly reduces. Whereas in a two level, the number of product terms is high giving room for the use of a many transistors. This may be bulky as compared to multilevel logic. Therefore, less hardware and space can be achieved if multilevel combinational circuits are used. The bubble pushing technique is normally used in the design of multilevel circuits. Bubble pushing is applied to the De Morgan’s theorem in a logic diagram. In this technique AND is changed to OR and vice versa. Original bubbles are then removed and more bubbles added where there were none. By so doing circuits are redrawn and the bubbles cancel out in a way that it becomes easy to determine the functions. 6. 2.6 X’S and Z’S: For this section, lets say that mathematics takes the lead. In electronics, circuits are normally represented by binary outcomes in that the output is either o or 1. But at times floating values may occur in circuits too that might just be represented by x and z. An illegal value X is used to show that the circuit has an unknown value. This happens when a process known as contention occurs. This is taken to be an error which is not appreciated. The gates being driven by high or low experience a voltage that is between zero and VDD. This may lead to high amounts of power flowing through which may at times damage the entire circuit. In a special case X sometimes denote that the value in the truth table is unimportant. The related Z shows that the node is not influenced by neither 0 nor 1. The node may seem to be floating but, in the real sense, the node might be either of the two. The problem may occur when one fails to connect a point in the circuit or when one assumes that the disconnected point represents a 0 value. This causes the circuit to output an error. At times a simple touch may also trigger the same results because the body has static charges. If such errors have to be accommodated then tristate buffers have to be used. The buf-fers normally have three states which are HIGH, LOW and floating Z. They are used on busses to connect multiple chips. 7. 2.7 Karnaugh maps: This are maps that are graphically used to simplify Boolean equations. They are best used for cases with four variables. The maps help reduce the possibility of doing a much extensive and a mind tiring calculation. The maps utilize the ability of humans to use patterns in solving mathe-matical and logical problems. This makes it possible for one to foresee and do away with a com-plex line of thought. Karnaugh maps uses a 2-D grid with Boolean values obtained from the truth table. The cells are arranged in such a way that for each condition of the cell a specific input condition is represented, and for each cell value, there is a corresponding output value. The kar-naugh maps serve as clever solving methods of dealing with Boolean results. The real world log- ic results are made in such a manner that can be represented by the least number of physical logic gates. This shows that space is a solved issue and aims to reduce the size of circuits making them even much compact. The common implementation methods can always be used. For instance, the sums-of-product expression can be solved by AND gates going into OR gates. While OR gates going into AND gates may be used to represent product-of-sums expressions. Logic mini-mization is made very much possible by sampling wrapping around common terms on the map. Karnaugh maps offer various techniques of solving even the most complex functions. 8. 2.8 Combinational building blocks: It is always relevant to create groups or making a pact in order to straighten thing up. Thus, combinational logic is at times grouped to much bigger blocks so as to make complex systems. This is a well calculated strategy that puts a away the redundant gate-levels and focuses entirely on building blocks. Such useful building blocks though complicated include, segment decoders, full adders and priority circuit designs. Another important building block is the multiplexer which take several inputs and select a suitable output. 9. 2.9 Timing: Time is a very important factor more so when it comes to electronics. Circuits need to run fast and effectively to achieve the intended purpose. This topic addresses the issue on time. How to make circuits run fast. Electronic device may delay at times or may tend to be slower. One may feed an input which results in an output but with a much slower pace. Thus for a good circuit de-sign, the transition from LOW to HIGH has to be fast. This is normally referred to as the rising edge in buffers. The falling edge which is pretty much the same as the rising edge must also be fast. In a more practical sense, this can be compared to a simple switch for lighting a bulb. It should be an instant output for an instant click of the switch. However, delays may occur at times in circuits. This should be almost unnoticeable in that it should only take a fraction of a second. Combinational logic circuits go through such delays. The propagation and contamination delay for combinational logic circuits should be minimized. This can be done by using capacitors that charge faster so as to initiate the functions of the circuit system. The use of inputs and out-puts that operate at the same level of speed. 10. 2.10 Summary: So far combinational logic gates help solve a wide range of problems in electronics. Logic gate implementation is a very important element of circuit design. The accuracy and precision of making gates solely depends on the nature of transistors used and the type of implementation procedure. With Boolean equations at play, the need for trial and error is done away with. A good analysis of Boolean equations assists in coming up with a good circuit that can be used for a specific purpose. Electrical software are of great help in such operations, but a good knowledge of combinational logic circuits and Boolean algebra will suffice. 2) Grey Box Exploration The first gray box in chapter 2 is on page 57, where an important point is mentioned concerning the rules of the game. It has been noted that the rules of combinational composition are as binding but aren’t so necessary. Some circuits may disobey the rules but still follow a common truce which is the output-input combination. From a prior knowledge one may think that rules have to be followed to the letter, but as it appears it’s, not the case. Another interesting part is on oddball circuits (Harris and Harris 57). The writer points out to the reader that these circuits are difficult to decipher. So as long as one remains on the combinational composition way of doing things, oddball circuits won’t be a bother. The other interesting note is found on page 63 that briefly talks about Augustus De Morgan, a brilliant mathematician who was born in India but traces his roots back to Britain. He had a blind eye, but that did not stop him from becoming a great mathematician. His father passed on when he was at age 10. He lived the rest of his life without a father, but his determination propelled him to higher heights, as he attended Trinity College and was soon declared to be a professor of mathematics at age 22. Mind you this is a very young age for such status, only geniuses attain this. He wrote very many papers on mathematics, and I certainly would refer him to be scientists too as his work finds a lot of applications in modern day science. The crater on the moon was named for him as he was an inspiring intellect. Augustus died in the year 1871 having left a lega-cy behind. 3 ) Figures Two figures have been selected from chapter two. This is basically because of their great significance or their frequency of use through the chapter and book. The table below shows various theorems that have made a great contribution to combinational logic systems. ! Figure 1: Explains the various theorems applicable in combinational logic. De Morgan’s Theorem T12 is of interest as it defines the relevance of the complement of product and the summation. The sum of complement of each term is equal to the complement of a prod-uct of all terms. The theorem goes on to explain that the product of complement of each term is equal to the complement of sum of all terms. The theorem also asserts that a NOR gate that has inverted inputs serves the same purpose as a NAND gate, which is very true. ! Figure 2: Shows NAND and NOR gate. The figure above shows simple NAND and NOR gates and there similar outputs at the table. An inverted NOR gate has the same output as a standard NAND gate and the reverse is also true. 4) Example Problems 1. A decoder implementation ! ! Fig 3: Decoder implementation and truth table 2. Find the propagation and contamination delay where each gate has a delay of 100picoseconds and a 60ps contamination delay. Solution: First we begin by finding the critical path and then the shortest path. The path to output Y through 3 gates. The tpd is s times the propagation that is 300 ps. The tcd is 120ps as there are only two gates to shortest path. ! Fig 4: Critical path. ! Fig 5: Short path 3. Why is the contamination delay of a circuit less than its propagation delay? Solution: This is probably because the path followed by the propagation delay is normally longer than the path followed by contamination delay. Since the critical path and the shortest path normally affect them both, it is important to minimize paths travelled during propagation. 4. Implement 8-to-3 binary encoder with a well-designed circuit. Solution: y2= f4+ f5 + f6 + f7; y1= f2 + f3 + f6 + f7; y0= f1 + f3 + f5 + f7 The truth table is as shown below. F7 F6 F5 F4 F3 F2 F1 F0 Y2 Y1 Y0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 5. Convert the following binary table to gray code. B2 B1 B0 G2 G1 G0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 1 0 1 1 0 1 0 1 0 0 1 1 0 1 0 1 1 1 1 1 1 0 1 0 1 1 1 1 1 0 0 G2= B2; ; = ; ; = 6. Simplify A +AB Solution: first we factor out A for both terms. A (1+B) then we use the identity A+1=1, this results to A(1). Finally applying identity 1A = A we have our final answer as A. 5) Glossary For our glossary, the following were the results as per the dictionary. 1.! Complement: A thing that completes or brings to perfection. “The libretto proved a perfect complement to the music." 2.! Delay: To make (someone or something) late or slow. The train was delayed." 3.! Block: A large solid piece of hard material, especially rock, stone, or wood, typically with flat surfaces on each side." a block of marble." Verb: make the movement or flow in (a passage, pipe, road, etc.) difficult or impossible. "Block up the holes with sticky tape." 4.! Timing: the choice, judgment, or control of when something should be done. One of the secrets of golf is good timing." 5.! Logic: the science that investigates the principles governing correct or reliable inference. 6) Interview Question Question 2.3 what is a tristate buffer? How and why is it used? A tristate buffer comprises of two inputs, one for control denoted as ‘c’ and the other for data represented by ‘x.' the output is represented by ‘z = x’ meaning that the state of input is the same as output. If input is 0 the output, is also 0. The control input functions like a valve. This special buffer helps us control the current passing through a circuit or a device. 7) Reflection Chapter 2 discussed combinational logic systems. The book highlights multiple things concerning non-sequential logic systems. Some Boolean equations discussed are quite difficult to under-stand but a closer look will get you at a good standing. The easiest part was on the various logic gates. This are the very basic constituents of transistors and the center point of combinational gates. 8) Questions for Lecture: Q1: What is truth table based on? Q2: Is decoder implementation based on the input and output of the truth table? Q3: Is De Morgan’s law always means the opposite? Works Cited "Combinational Logic Circuits." Digital and Analog Electronics Course, electronics-course.com/ combinational-logic. Dictionary.com, www.dictionary.com/. Harris, Sarah L, and David M. Harris. Digital Design and Computer Architecture. Elsevier, Morgan Kaufmann, 2016.
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Reading Chapter Report
Chapter 4: Hardware Description Language
A. Introduction
The Digital logic concepts entail design of the combinational and sequence circuit at the
schematic level. In a digital circuit, it’s important to find an efficient set of logic gates. The
report provides a description of the Hardware description language and its application with the
regards to the digital logics.
1.

Chapter Outline

4.1 Introduction
A hardware description language is the programming language used to describe the behavior and
structure of the Integrated Circuits and the logic gates.
4.1.1. Modules
Modules consist of the combination of the inputs and outputs
Characteristics of Verilog and VHDL
4.1.2 Language Origin
4.1.3 Simulation and Synthesis
The function of the Hardware Definition Language contains the logic simulations and
combination.
Simulation

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Consistent stimulation is an effective approach for testing a computer system and discovering the
errors that exist in the networking device.
Synthesis
Synthesis is the transformation of the Hardware description language code and entails describing
the logic gates and networking wires that communicate between the two end-to-end
communications networking device.
Test bench
The test bench is the code in the VHDL intended for simulation and can’t be synthesized. The
test bench consists of inputs to the module and checks whether the discrepancies are correct.
4.2 Combinational Logics
Combinational logics can be used in design the asynchronous circuits, and the records. The
outputs of a given combinational outputs are dependent on the set of inputs.
Bitwise operator
The bitwise operator act on either single bit or a double bit operator. The bitwise operator
consists of a series of multiplexers and inverters.
Comment and White spaces
Verilog and VHDL are choosy when using and utilizing the white spaces since the logical gates
are much concerned in the use of whitespaces and the indentation.
Reduction Operators
This imply the use of multiple user gates across a single bus. Reduction bus consists of OR,
XOR, NAND and NOR gates.
Conditional Assignment

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This is the process of selecting outputs based on the given inputs described as the conditions in a
given bit operators. A conditional operator chooses between the three sets of expressions.
VHDL Precedence
This chapter section describes the computation of the HDL to describe the order of operations
defined by a given set of programming language.
Verilog operator precedence
This sections contains the different operators in the Verilog such as the:
4.2.9 Bit Swizzling
This is procedure of forming subset of buses based on the given set of digital gates. The signal
can be combined so as to create a digital buses.
4.3 Structural modelling.
This section explains the relationship between the module in terms of their relationship based on
the given set of inputs and outputs.
4.4 Sequential Logic
This section describes the coding style that enhances the circuit into digital registers and latches.
4.4.1 Registers
Designed using the positive flip flop edge-triggered components.
4.4.2 Resettable registers
During network simulation, power is applied to the circuit enabling the circuit to produce
predetermined output of the flop.
4.4.3 Enabled Register

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This type of registers respond to the clocks only when the clock assertion is enabled.
Asynchronous resettable device assume two given states either as reset and en if the condition of
the state is FALSE.
4.4.4 Multiple register
Using the statement always and process, this can be used to describe the multiple instances of the
hardware components.
4.4.5 Latches
This section explains the functioning of latches allowing data flow from input to output in a
given HDL powered system. Most of the synthesized tools can be used to support latches.
4.5 More combinational logics
This section is used to describe the behavior of combinational logics. In this section, we’ll study
on the use of Verilog and VHDL in the design of combinational circuits.
4.5.1 Case statement
Combinational logics uses always/process to design an effective combinational logic that is
either prone to error or cost effective.
4.9 Summary
HDL tool is important in the design of the digital circuits. Using the knowledge learned on
Verilog and VHDL, designers are able to design the system schematic more efficiently.
2. Grey box exploration
3. FIGURES
In the chapter 4 of hardware description language, I choose two figures in enhancing the concept
of HDL machines, applying the theorem of combination.
4. Glossary

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From the glossary, it’s easier to evaluate the HDL module equ...


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