Digital Electronics: Sequential logic circuits

Aug 6th, 2016
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This file contains: applications of flip-flops in sequential logic circuits(Counters and Registers), registers(SISO shift register, SIPO shift register, PISO shift register and PIPO shift register).

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SPH 2433 Sep-Dec 2015SPH 2433 Digital Electronics4.7.1. Applications of flip-flops in sequential logic circuitsFlip-flops are applied in sequential logic circuits that include:i. Countersii. Registersi. Counter A counter consists of a cascaded arrangement of edge-triggered flip-flops. For instance, Figure 4.7.1.1shows a counter that consists of four cascaded negative edge-triggered J-K flip-flops wired as toggle flipflops (both the J and K inputs are at logic level 1 at the same time).Figure 4.7.1.1: 4-bit counter.The outputs of the four flip-flops are designated as Q0, Q1, Q2 and Q3.As can be seen in the diagram, the output of the first flip-flop (FF0) feeds the clock input of the secondflip-flop (FF1), and the output of the second flip-flop (FF1) feeds the clock input of the third flip-flop(FF2), the output of which in turn feeds the clock input of the fourth flip-flop (FF3).Consequently, apart from the FF0 that is connected to the clock signal, the other flip-flops in thearrangement DO NOT change state in synchronization with the clock input. Instead, the clock input ofany subsequent flip-flop is driven by the output of a preceding flip-flop i.e. Q0 drives the clock input ofFF1, Q1 drives the clock input of FF2, and Q2 drives the clock input of FF3.Such a counter is referred to as an asynchronous counter in the sense that the flip-flops do not changestate in synchronization with the input clock.Operational bas

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